Studies - Texture Caching

The Town scene benchmark is one of the benchmarks used in the study of texture caching and is taken from the Silicon Graphics Reality Engine Demo Suite.

The following images are visualizations of the texture cache misses in the Town scene.
The visualizations show where the misses occur in Screen space. A Blue dot indicates that exactly one cache miss occurs at that screen location, a Green dot indicates that exactly two cache misses occur at that screen location, and a Red dot indicates that three or more cache misses occur at that screen location.

Base Results


(i) COLD misses measured with a Fully Associative 128KB cache.

(ii) COLD+CAPACITY misses measured with a Fully Associative 32KB cache.

(iii) COLD+CAPACITY+CONFLICT misses measured with a 2-way Set-Associative 32KB cache.

(iv) COLD+CAPACITY+CONFLICT misses measured with a Direct Mapped 32KB cache.

These visualizations show that the number of cold misses in the Town scene is fairly low and that a substantial number of capacity and cold misses are introduced when we reduce cache size and cache associativity.


Results for 32KB cache size, 2-way set-associativity, and 128 byte line size


(v) Nonblocked representation in memory and Nontiled rasterization in screen space. (Same as figure (iii) above).

(vi) Blocked representation in memory only. Nontiled rasterization in screen space.

(vii) Tiled rasterization in screen space only. Nonblocked representation in memory.

(viii) Both Blocked representation in memory and Tiled rasterization in screen space.

By comparing figure (v) with figure (vi) above, we see that blocked representation of texture images in memory can reduce the miss rates. In addition, by comparing figure (v) with figure (vii) above, we see that tiled rasterization in screen space can also reduce the miss rates. When blocked representation of texture images in memory is combined with tiled rasterization in screen space, as shown in figure (viii), we get the best miss rate results. Thus, we see that these two optimizations are orthogonal to each other. Overall, these visualizations show that it is not sufficient to simply vary the cache architecture parameters alone to achieve the best results since optimizations at the application level are needed.


This study was conducted by Ziyad Hakura and Anoop Gupta. Details can be found in the ISCA 1997 paper entitled The Design and Analysis of a Cache Architecture for Texture Mapping .


zsh@graphics.stanford.edu