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Picture Processing Unit

With a working CPU, we can begin designing the Picture Processing Unit. Unlike the CPU, the PPU does not have an instruction set it needs to support. Its behavior is determined by the graphics specification set by the Nintendo. This makes the design process completely different than the CPU.

According to the Nintendo specification, the PPU has eight memory mapped registers that the CPU can address for configuring the graphics memory and behavior. Every 20 ms, the PPU will begin a screen refresh. Each of 240x256 pixels are generated from combining the Pattern tables, Name tables, Attribute tables, and Sprite Information described previously. The CPU can write to any of these tables through the IO registers provided by the PPU.

To design the PPU, we take a different approach from the CPU. The PPU's behavior is only defined by its final output, not the cycle times in performing the screen refresh. Here, we know how to generate a frame, so we can use graphics memory as the limiting resource that can dictate our design. Since there is only one memory bus, each fetch of data from the different tables must occur on different clock cycles. The behavior outlines exactly what is required of both the datapath and control logic.

Ian A. Buck
Wed May 20 12:50:42 EDT 1998