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PPU Control

The control logic is quite simple as well compared to the CPU. In between refreshes, the PPU must remain in an idle state for it to handle IO from its CPU memory mapped registers. As soon as the refresh clock signals a redraw, the PPU will clear the Vert and Horz registers and begin to redraw the screen.

figure135

Ian A. Buck
Wed May 20 12:50:42 EDT 1998