The remaining architecture which is necessary for the Nintendo are the two separate memories, the edge connector for the game cartridge, and the RF output generator. These components do not require any serious design issues since they all are fairly straightforward. The memories are both standard 2K 12bit address/ 8bit data. The edge connector exports both the graphics data bus and the program data bus to the game cartridge so that it can make available its code and pattern tables. The RF output simply will output pixels generated from the PPU to an output file that can be parsed and displayed graphically.
Figure 10: The Complete NES schematic including CPU, PPU, the two memory units and the edge connector. A PPU addressing unit was added to help the CPU access the PPU memory mapped registers.