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Memory Architecture

The memory breakdown defines where all of the different components of the Nintendo reside. Virtually everything in the Nintendo is memory mapped, primarily since this is the only way the CPU can communicate with the external devices such as the controllers, sound registers, and PPU. The CPU program memory is kept separately from the graphics memory in order not to fill up the code space with patterns and tables. This means that the CPU can only write to the graphics memory through the PPU control registers (mapped to addresses 2000-2007). There is 2K of internal program RAM and 2K of internal graphics RAM. The game cartridge gets an entire tap of the CPU and PPU busses and have complete control over where their internal ROMs which contain the program code and pattern tables appear in the address space. The following diagram is a typical memory breakdown for an NES game:

Figure 3: Cpu and PPU memory mappings. All the components on the Nintendo are memory mapped so that the Cpu can communicate with them.

Ian A. Buck
Wed May 20 12:50:42 EDT 1998