Prefetching in a Texture Cache Architecture
Matthew Eldridge, and
Appears in the Proceedings of the 1998 Eurographics/SIGGRAPH Workshop on Graphics Hardware
Texture mapping has become so ubiquitous in real-time graphics hardware
that many systems are able to perform filtered texturing without any
penalty in fill rate. The computation rates available in hardware have
been outpacing the memory access rates, and texture systems are becoming
constrained by memory bandwidth and latency. Caching in conjunction with
prefetching can be used to alleviate this problem.
In this paper, we introduce a prefetching texture cache architecture
designed to take advantage of the access characteristics of texture
mapping. The structures needed are relatively simple and are amenable to
high clock rates. To quantify the robustness of our architecture, we
identify a set of six scenes whose texture locality varies over nearly two
orders of magnitude and a set of four memory systems with varying
bandwidths and latencies. Through the use of a cycle-accurate simulation,
we demonstrate that even in the presence of a high-latency memory system,
our architecture can attain at least 97% of the performance of a
zero-latency memory system.
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