Once the datapath is designed and implemented in the VHDL environment, work can begin on the control logic. Here the groupings of the different instructions is critical for an efficient design. The more the state machine for the different instructions can share states without too much conditional logic.
Design of the control logic really began with the design of the datapath. The connections between registers and the alu during the register transfer design of the datapath, laid out the microcode necessary for control logic.
Figure 5: Microcode for fetching the operand for Indexed indirect addressing. This five cycle operation conforms to the correct instruction timing of a real 6502.