This state manages handling all of the microops which appear in an OP instruction. The only real difference here is that we do not use a priority request flip flop as Prosser & Winkle, rather after we are done processing an micro op, we simply remove it from the IR register. The other issue is with the skips. The AC must first be put on the bus so that the control can check its value. This adds an extra state but otherwise does not effect the ASM.