contents of various registers (see Section 2.1 for more information on that). These 16 bits are latched. We decided to take advantage of the bi-directional capabilities of the parallel port and read the 16 bits on demand. Two of the lines coming out of the 3:8 decoder (controlled by the 3 control lines) control the 8-bits tri-states. In correct operation of the interface, when the tri-states are tri-stated, the data lines of the parallel port are set to output. Once the tri-states are off, the port is set to input.